Uart Error Status Fifo - Samsung S5PC110 Manual

S5PC110_UM
Type
Rx interrupt Generated if Rx FIFO count is greater than or equal
to the trigger level of received FIFO.
Generated if the number of data in FIFO does not
reaches Rx FIFO trigger Level and does not
receive any data during 3-word time (receive time
out). This interval follows the setting of Word
Length bit.
Tx interrupt Generated if Tx FIFO count is less than or equal to
the trigger level of transmit FIFO (Tx FIFO trigger
Level).
Error Generated if frame error, parity error, or break
interrupt signal are detected.
Generated if UART receives new data when Rx
FIFO is full (overrun error).

1.3.8 UART ERROR STATUS FIFO

UART contains the error status FIFO besides the Rx FIFO register. The error status FIFO indicates which data,
among FIFO registers is received with an error. An error interrupt is issued only if the data containing an error, is
ready to read out. To clear the error status FIFO, URXHn with an error and UERSTATn must be read out.
For example, it is assumed that the UART Rx FIFO receives A, B, C, D, and E characters sequentially and the
frame error occurs while receiving 'B' and the parity error occurs while receiving 'D'.
The actual UART receive error does not generate any error interrupt, since the character, which was received with
an error was not read. The error interrupt occurs if the character is read out.
Time Sequence Flow
#0 If no character is read out
#1 A, B, C, D, and E is received
#2 After A is read out
#3 After B is read out
#4 After C is read out
#5 After D is read out
#6 After E is read out
1 UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
Table 1-1 Interrupts in Connection with FIFO
FIFO Mode
Frame error (in B) interrupt occurs.
Parity error (in D) interrupt occurs.
Generated by receive holding register
whenever receive buffer becomes full.
Generated by transmit holding register
whenever transmit buffer becomes
empty.
Generated by all errors. However if
another error occurs at the same time,
only one interrupt is generated.
Error Interrupt
-
-
-
-
-
Non-FIFO Mode
Note
The 'B' has to be read out.
The 'D' has to be read out.
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