Samsung S5PC110 Manual page 641

Risc microprocessor
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S5PC110_UM
3.8.4.8 Interrupt Controller OneNAND Status Register (INTC_ONENAND_STATUS, R, Address =
0xB060_1068)
INTC_ONENAND_
STATUS
-
OSINTD
Bit
[31:2]
Reserved
[1:0]
OneNAND Status INT Done
This bits are logical AND operation result of OPINTD
(OneNAND pending INT done) bit flags of the interrupt
controller OneNAND pending register
(INTC_ONENAND_PEND) and inverse of OMINTD
(OneNAND mask INT done) bit flag of the Interrupt Controller
OneNAND Mask Register (INTC_ONENAND_MASK)
Description
3 ONENAND CONTROLLER
Initial State
-
00b
3-39

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