Universal Asynchronous Receiver And Transmitter; Overview Of Universal Asynchronous Receiver And Transmitter; Key Features Of Universal Asynchronous Receiver And Transmitter - Samsung S5PC110 Manual

S5PC110_UM
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UNIVERSAL ASYNCHRONOUS RECEIVER AND
TRANSMITTER

1.1 OVERVIEW OF UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER

The Universal Asynchronous Receiver and Transmitter (UART) in S5PC110 provide four independent
asynchronous, and serial input/output (I/O) ports. All the ports operate in an interrupt-based or a DMA-based
mode. The UART generates an interrupt or a DMA request to transfer data to and from the CPU and the UART.
The UART supports bit rates up to 3Mbps. Each UART channel contains two FIFOs to receive and transmit data:
256 bytes in ch0, 64 bytes in ch1 and 16 bytes in ch2 and ch3.
UART includes programmable baud rates, infrared (IR) transmitter/receiver, one or two stop bit insertion, 5-bit, 6-
bit, 7-bit, or 8-bit data width and parity checking.
Each UART contains a baud-rate generator, a transmitter, a receiver and a control unit, as shown in
The baud-rate generator uses PCLK or SCLK_UART. The transmitter and the receiver contain FIFOs and data
shifters. The data to be transmitted is written to Tx FIFO, and copied to the transmit shifter. The data is then
shifted out by the transmit data pin (TxDn). The received data is shifted from the receive data pin (RxDn), and
copied to Rx FIFO from the shifter.

1.2 KEY FEATURES OF UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER

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RxD0, TxD0, RxD1, TxD1, RxD2, TxD2, RxD3 and TxD3 with DMA-based or interrupt-based operation
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UART Ch 0, 1, 2 and 3 with IrDA 1.0
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UART Ch 0 with 256-byte FIFO, Ch 1 with 64-byte FIFO, Ch2 and 3 with 16-byte FIFO
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UART Ch 0, 1 and 2 with nRTS0, nCTS0, nRTS1, nCTS1, nCTS2 and nRTS2 for Auto Flow Control
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Supports handshake transmit/receive.

1 UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER

Figure 1-1.
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