Samsung S5PC110 Manual page 841

Risc microprocessor
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S5PC110_UM
2 IIC-BUS INTERFACE
START
Slave Tx mode has
been configured.
I2C detects start signal. and, I2CDS
receives data.
I2C compares I2CADD and I2CDS
(the received slave address).
N
Matched?
Y
The I2C address match
interrupt is generated.
Write data to I2CDS.
Clear pending bit to
resume.
Y
Stop?
N
END
The data of the I2CDS
is shifted to SDA.
Interrupt is pending.
Figure 2-8
Operations for Slave/ Transmitter Mode
2-9

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