Samsung S5PC110 Manual page 81

S5PC110_UM
2.2.3.2 Port Group GPA1 Control Register (GPA1DAT, R/W, Address = 0xE020_0024)
GPA1DAT
GPA1DAT[3:0]
2.2.3.3 Port Group GPA1 Control Register (GPA1PUD, R/W, Address = 0xE020_0028)
GPA1PUD
GPA1PUD[n]
2.2.3.4 Port Group GPA1 Control Register (GPA1DRV, R/W, Address = 0xE020_002C)
GPA1DRV
GPA1DRV[n]
2.2.3.5 Port Group GPA1 Control Register (GPA1CONPDN, R/W, Address = 0xE020_0030)
GPA1CONPDN
GPA1[n]
2.2.3.6 Port Group GPA1 Control Register (GPA1PUDPDN, R/W, Address = 0xE020_0034)
GPA1PUDPDN
GPA1[n]
Bit
[3:0] When the port is configured as input port, the corresponding
bit is the pin state. When the port is configured as output
port, the pin state is the same as the corresponding bit.
When the port is configured as functional pin, the undefined
value will be read.
Bit
[2n+1:2n] 00 = Pull-up/ down disabled
01 = Pull-down enabled
n=0~3
10 = Pull-up enabled
11 = Reserved
Bit
[2n+1:2n] 00 = 1x
10 = 2x
n=0~3
01 = 3x
11 = 4x
Bit
[2n+1:2n] 00 = Output 0
01 = Output 1
n=0~3
10 = Input
11 = Previous state
Bit
[2n+1:2n] 00 = Pull-up/ down disabled
01 = Pull-down enabled
n=0~3
10 = Pull-up enabled
11 = Reserved
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Description
Description
Description
Initial State
0x00
Initial State
0x0055
Initial State
0x0000
Initial State
0x00
Initial State
0x00
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