Samsung S5PC110 Manual page 462

S5PC110_UM
5.5.3.30 Voltage Information Registers
APC1 has two types of voltage information registers. Ones are for closed-loop control, and the others are for
open-loop control. Registers for closed-loop control give delay information, while registers for open-loop control
give direct voltage information. There is a register containing the retention voltage level for the performance level
zero.
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Calibration Code Registers (APC_PL1_CALCODE, R/W, Address = 0xE070_0080)
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Calibration Code Registers (APC_PL2_CALCODE, R/W, Address = 0xE070_0084)
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Calibration Code Registers (APC_PL3_CALCODE, R/W, Address = 0xE070_0088)
•
Calibration Code Registers (APC_PL4_CALCODE, R/W, Address = 0xE070_008C)
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Calibration Code Registers (APC_PL5_CALCODE, R/W, Address = 0xE070_0090)
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Calibration Code Registers (APC_PL6_CALCODE, R/W, Address = 0xE070_0094)
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Calibration Code Registers (APC_PL7_CALCODE, R/W, Address = 0xE070_0098)
•
Calibration Code Registers (APC_PL8_CALCODE, R/W, Address = 0xE070_009C)
The Calibration Code Registers are eight, 5-bit registers. Their names are APC_PL1_CALCODE ~
APC_PL8_CALCODE. They give delay information target for closed-loop operation.
APC_PL*_CALCODE
Reserved
Reference Calibrated Code 1
•
Open-loop VDD Core Registers (APC_PL1_COREVDD, R/W, Address = 0xE070_00A0)
•
Open-loop VDD Core Registers (APC_PL2_COREVDD, R/W, Address = 0xE070_00A4)
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Open-loop VDD Core Registers (APC_PL3_COREVDD, R/W, Address = 0xE070_00A8)
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Open-loop VDD Core Registers (APC_PL4_COREVDD, R/W, Address = 0xE070_00AC)
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Open-loop VDD Core Registers (APC_PL5_COREVDD, R/W, Address = 0xE070_00B0)
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Open-loop VDD Core Registers (APC_PL6_COREVDD, R/W, Address = 0xE070_00B4)
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Open-loop VDD Core Registers (APC_PL7_COREVDD, R/W, Address = 0xE070_00B8)
•
Open-loop VDD Core Registers (APC_PL8_COREVDD, R/W, Address = 0xE070_00BC)
The Open-loop VDD Core Registers are eight, 7-bit registers. Their names are APC_PL1_COREVDD ~
APC_PL8_COREVDD. They give direct voltage information for open-loop operation.
APC_PL*_COREVDD
Reserved
OL_VDD1
Bit
[7:5] Read undefined. Write as zero.
[4:0] The RCC for performance level *
Bit
[7] Read undefined. Write as zero.
[6:0] The voltage value for the performance level * in the
open-loop mode.
5 INTELLIGENT ENERGY MANAGEMENT
Description
Description
Initial State
X
0x1F
Initial State
X
0x7F
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