Register Description; Register Map - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM

2.5 REGISTER DESCRIPTION

2.5.1 REGISTER MAP

Register
Address
I2CCON0
0xE180_0000
I2CSTAT0
0xE180_0004
I2CADD0
0xE180_0008
I2CDS0
0xE180_000C
I2CLC0
0xE180_0010
I2CCON2
0xE1A0_0000
I2CSTAT2
0xE1A0_0004
I2CADD2
0xE1A0_0008
I2CDS2
0xE1A0_000C
I2CLC2
0xE1A0_0010
I2CCON_HD
0xFAB0_0000
MI_DDC
I2CSTAT_HD
0xFAB0_0004
MI_DDC
I2CADD_HD
0xFAB0_0008
MI_DDC
I2CDS_HDMI
0xFAB0_000C
_DDC
I2CLC_HDMI
0xFAB0_0010
_DDC
I2CCON_HD
0xFA90_0000
MI_PHY
I2CSTAT_HD
0xFA90_0004
MI_PHY
I2CADD_HD
0xFA90_0008
MI_PHY
I2CDS_HDMI
0xFA90_000C
_PHY
I2CLC_HDMI
0xFA90_0010
_PHY
2
NOTE: I
C-Bus Interface0 is dedicated to general purpose
2
I
C-Bus Interface2 is dedicated to PMIC control
R/W
2
R/W
Specifies the I
C-Bus Interface0 control register
2
R/W
Specifies the I
C-Bus Interface0 control/status register
R/W
2
Specifies the I
C-Bus Interface0address register
2
R/W
Specifies the I
C-Bus Interface0transmit/receive data
shift register
2
R/W
Specifies the I
C-Bus Interface0multi-master line
control register
R/W
2
Specifies the I
C-Bus Interface2 control register
2
R/W
Specifies the I
C-Bus Interface2 control/status register
R/W
2
Specifies the I
C-Bus Interface2 address register
2
R/W
Specifies the I
C-Bus Interface2 transmit/receive data
shift register
2
R/W
Specifies the I
C-Bus Interface2 multi-master line
control register
R/W
2
Specifies the I
C-Bus Interface for HDMI DDC control
register
2
R/W
Specifies the I
C-Bus Interface for HDMI DDC
control/status register
2
R/W
Specifies the I
C-Bus Interface for HDMI DDC address
register
2
R/W
Specifies the I
C-Bus Interface for HDMI DDC
transmit/receive data shift register
2
R/W
Specifies the I
C-Bus Interface for HDMI DDC multi-
master line control register
2
R/W
Specifies the I
C-Bus Interface for HDMI PHY control
register
2
R/W
Specifies the I
C-Bus Interface for HDMI PHY
control/status register
2
R/W
Specifies the I
C-Bus Interface for HDMI PHY address
register
2
R/W
Specifies the I
C-Bus Interface for HDMI PHY
transmit/receive data shift register
2
R/W
Specifies the I
C-Bus Interface for HDMI PHY multi-
master line control register
Description
2 IIC-BUS INTERFACE
Reset Value
0x0X
0x00
0xXX
0xXX
0x00
0x0X
0x00
0xXX
0xXX
0x00
0x0X
0x00
0xXX
0xXX
0x00
0x0X
0x00
0xXX
0xXX
0x00
2-12

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