Samsung S5PC110 Manual page 479

Risc microprocessor
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S5PC110_UM
Arbitration scheme
In the AXI interconnect, you can configure each MI separately to contain an arbitration scheme. This scheme
is further classified as:
Non-programmable RR scheme
Programmable RR scheme
Programmable LRG scheme
The AW and AR channels have separate arbiters, and can be programmed (if applicable) and interrogated
separately through APB programming interface. However, both AW and AR channels are configured identically. If
these channels are arbitrated separately, MI can permit simultaneous read and write transactions from different
SIs.
The arbitration policy is decided by the values of SFRs. An arbitration decision taken in the current cycle does not
affect the current cycle.
If no SIs are active, the arbiter adopts default arbitration, that is, the highest priority SI. If default arbitration occurs
and the highest priority SI becomes active in the same cycle as (or before) any other SI, then this does not
constitute a grant to an active SI and the arbitration scheme does not change its state.
If a QoS provision is active, only a subset of SI is permitted to win arbitration. There is no guarantee that the
default arbitration is among these. In these circumstances, no transaction is permitted to use the default
arbitration, and arbitration must occur whenever there is an active SI.
Figure 1-1
Example of ProgQoS Control for 2-1 Interconnect
1 BUS CONFIGURATION
1-3

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