Samsung S5PC110 Manual page 526

Risc microprocessor
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S5PC110_UM
Register
TZIC3IntSelect
TZIC3FIQEnable
TZIC3FIQENClear
TZIC3FIQBypass
TZIC3Protection
TZIC3Lock
TZIC3LockStatus
TZIC3PeriphID0
TZIC3PeriphID1
TZIC3PeriphID2
TZIC3PeriphID3
TZIC3PCellID0
TZIC3PCellID1
TZIC3PCellID2
TZIC3PCellID3
Address
R/W
0xF2B0_0008
R/W
0xF2B0_000C
R/W
0xF2B0_0010
W
0xF2B0_0014
R/W
0xF2B0_0018
R/W
0xF2B0_001C
W
0xF2B0_0020
R
0xF2B0_0FE0
R
0xF2B0_0FE4
R
0xF2B0_0FE8
R
0xF2B0_0FEC
R
0xF2B0_0FF0
R
0xF2B0_0FF4
R
0xF2B0_0FF8
R
0xF2B0_0FFC
R
1 VECTORED INTERRUPT CONTROLLER
Description
Register
Specifies the Interrupt Select Register
Specifies the FIQ Enable Register
Specifies the FIQ Enable Clear Register
Specifies the FIQ Bypass Register
Specifies the Protection Register
Specifies the Lock Enable Register
Specifies the Lock Status Register
Specifies the Peripheral Identification
Registers
Specifies the Identification Registers
Reset Value
0x00000000
0x00000000
-
0x00000000
0x00000000
-
0x00000001
0x00000090
0x00000018
0x00000004
0x00000000
0x0000000D
0x000000F0
0x00000005
0x000000B1
1-19

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