Samsung S5PC110 Manual page 236

S5PC110_UM
2.2.55.72 GPIO Interrupt Control Registers (GPD0_INT_MASK, R/W, Address = 0xE020_0914)
GPD0_INT_MASK
Reserved
GPD0_INT_MASK[3]
GPD0_INT_MASK[2]
GPD0_INT_MASK[1]
GPD0_INT_MASK[0]
2.2.55.73 GPIO Interrupt Control Registers (GPD1_INT_MASK, R/W, Address = 0xE020_0918)
GPD1_INT_MASK
Reserved
GPD1_INT_MASK[5]
GPD1_INT_MASK[4]
GPD1_INT_MASK[3]
GPD1_INT_MASK[2]
GPD1_INT_MASK[1]
GPD1_INT_MASK[0]
Bit
[31:4] Reserved
[3] 0 = Enables Interrupt
1 = Masked
[2] 0 = Enables Interrupt
1 = Masked
[1] 0 = Enables Interrupt
1 = Masked
[0] 0 = Enables Interrupt
1 = Masked
Bit
[31:6] Reserved
[5] 0 = Enables Interrupt
1 = Masked
[4] 0 = Enables Interrupt
1 = Masked
[3] 0 = Enables Interrupt
1 = Masked
[2] 0 = Enables Interrupt
1 = Masked
[1] 0 = Enables Interrupt
1 = Masked
[0] 0 = Enables Interrupt
1 = Masked
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Initial State
0
1
1
1
1
Initial State
0
1
1
1
1
1
1
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