Samsung S5PC110 Manual page 697

S5PC110_UM
5.11.2.19 ATA PIO Device LBA Low Register (ATA_PIO_LLR, R/W, Address = 0xE820_0060)
ATA_PIO_LLR
Reserved [31:8]
pio_dev_llr
5.11.2.20 ATA PIO Device LBA Middle Register (ATA_PIO_LMR, R/W, Address = 0xE820_0064)
ATA_PIO_LMR
Reserved [31:8]
pio_dev_lmr
5.11.2.21 ATA PIO Device LBA High Register (ATA_PIO_LHR, R/W, Address = 0xE820_0068)
ATA_PIO_LHR
Reserved
pio_dev_lhr
5.11.2.22 ATA PIO Device Register (ATA_PIO_DVR, R/W, Address = 0xE820_006C)
ATA_PIO_DVR
Reserved
pio_dev_dvr
5.11.2.23 ATA PIO Device Command Status Register (ATA_PIO_CSD, R/W, Address = 0xE820_0070)
ATA_PIO_CSD
Reserved
pio_dev_csd
5.11.2.24 ATA PIO Device Control/Alternate Status Register (ATA_PIO_DAD, R/W, Address =
0xE820_0074)
ATA_PIO_DAD
Reserved
pio_dev_dad
Bit
Reserved
[7:0] 8-bit PIO device LBA low (command block) register
Bit
Reserved
[7:0] 8-bit PIO device LBA middle (command block) register
Bit
[31:8] Reserved
[7:0] 8-bit PIO LBA high (command block) register
Bit
[31:8] Reserved
[7:0] 8-bit PIO device (command block) register
Bit
[31:8] Reserved
[7:0] 8-bit PIO device command/status (command block)
register
Bit
[31:8] Reserved
[7:0] 8-bit PIO device control/ alternate status (control block)
register
Description
Description
Description
Description
Description
Description
5 COMPACT FLASH CONTROLLER
R/W Initial State
R
R/W
R/W Initial State
R
R/W
R/W Initial State
R
R/W
R/W Initial State
R
R/W
R/W Initial State
R
R/W
R/W Initial State
R
R/W
0x0
0x00
0x0
0x00
0x0
0x00
0x0
0x00
0x0
0x00
0x0
0x00
5-25