Clock Configuration - Samsung S3C2501X User Manual

S3C2501X

4.7 CLOCK CONFIGURATION

The S3C2501X has three PLL clocking scheme – CPU PLL, System BUS PLL, PHY PLL. All of the PLL can
operate if the corresponding clock select pin is set to "0" (CLKSEL- shared with CPU PLL and System BUS PLL,
PHY_CLKSEL). When the clock select pin is set to "1", the PLL goes into power down state. The CPU PLL can
generate ARM940T clock or system bus clock depending on clock mode selection (CLKMOD[1:0]). The System
BUS PLL generates system bus clock only. The PHY PLL generates clock for external devices. Each PLL clock
output frequency can be programmed by either the pin setting or software setting. In pin configurable mode, the
CPU_FREQ[2:0] pins determine the frequency of the CPU PLL clock output and the BUS_FREQ[2:0] pins
determine the frequency of the System BUS PLL clock output. The PHY_FREQ pin determines the frequency of
the PHY PLL output. The PHY PLL generates 2 times the input clock if the PHY_FREQ is "0" and 2.5 times the
input clock if the PHY_FREQ is "1".
The CLKMOD[1:0] pins determine the relation of the ARM940T clock and the system clock. If the CLKMOD[1:0]
is "00", the fastbus clock mode is defined. In this mode, the ARM940T clock and the system bus clock is the
same clock and the clock is from the CPU PLL output. The two clocks are of the same phase and of the same
frequency. If the CLKMOD[1:0] is "10" or "01", the sync clock mode is defined. In this mode, the frequency of the
ARM940T clock is always 2 times that of the system bus clock. If the CLKMOD[1:0] is "11", the async clock mode
is defined. In this mode, the ARM940T clock is out of the CPU PLL and the system bus clock is out of the System
BUS PLL. The frequency of the two clocks could be set to any frequency so long as the the frequency of the
ARM940T clock is faster than that of the system bus clock. The table 4-3 shows the clock configuration of the
external pin setting.
Table 4-3. Clock Frequencies for CLKMOD Pins, CPU_FREQ Pins, and BUS_FREQ Pins
CLKMOD [1:0]
2'b00 (Fastbus)
2'b10 (Sync1)
CPU_FREQ [2:0] BUS_FREQ [2:0]
3'b000
3'b001
3'b010
3'b011
3'b100
3'b101
3'b110
3'b111
3'b000
3'b001
3'b010
3'b011
3'b100
3'b101
3'b110
ARM940T Clock
Frequency
3'bxxx 166MHz
3'bxxx 150MHz
3'bxxx 133MHz
3'bxxx 125MHz
3'bxxx 100MHz
3'bxxx 66MHz
3'bxxx 50MHz
3'bxxx 33MHz
3'bxxx 166MHz
3'bxxx 150MHz
3'bxxx 133MHz
3'bxxx 125MHz
3'bxxx 100MHz
3'bxxx 66MHz
3'bxxx 50MHz
SYSTEM CONFIGURATION
AMBA BUS Clock
Frequency
166MHz
150MHz
133MHz
125MHz
100MHz
166MHz
50MHz
33MHz
83MHz
75MHz
66MHz
62.5MHz
50MHz
33MHz
25MHz
4-9