Table 11.2 Clock Signals To Input To Tcntv And Counting Conditions - Renesas H8/36912 Series User Manual

Table 11.2 Clock Signals to Input to TCNTV and Counting Conditions

Bit 2 Bit 1
CKS2 CKS1
0 0
1
1 0
1
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TCRV0
Bit 0
CKS0
0
1
0
1
0
1
0
1
TCRV1
Bit 0
ICKS0
Description
 Clock input prohibited
Internal clock: counts on φ/4, falling edge
0
Internal clock: counts on φ/8, falling edge
1
Internal clock: counts on φ/16, falling edge
0
Internal clock: counts on φ/32, falling edge
1
Internal clock: counts on φ/64, falling edge
0
Internal clock: counts on φ/128, falling edge
1

Clock input prohibited
 External clock: counts on rising edge

External clock: counts on falling edge

External clock: counts on rising and falling
edge
Rev. 1.00, 11/03, page 141 of 376