Register States In Each Operating Mode - Renesas H8 Series Hardware Manual

19.3

Register States in Each Operating Mode

Register
Name Reset
LVDCR Initialized —
LVDSR Initialized —
CKCSR Initialized —
RCCR Initialized —
RCTRMDPR Initialized —
RCTRMDR Initialized —
ICCR1 Initialized —
ICCR2 Initialized —
ICMR Initialized —
ICIER Initialized —
ICSR Initialized —
SAR Initialized —
ICDRT Initialized —
ICDRR Initialized —
TMB1 Initialized —
TCB1/TLB1 Initialized —
TMRW Initialized —
TCRW Initialized —
TIERW Initialized —
TSRW Initialized —
TIOR0 Initialized —
TIOR1 Initialized —
TCNT Initialized —
GRA Initialized —
GRB Initialized —
GRC Initialized —
GRD Initialized —
FLMCR1 Initialized —
FLMCR2 Initialized —
EBR1 Initialized —
FENR Initialized —
TCRV0 Initialized —
Active Sleep
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Subsleep Standby
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
Initialized Initialized
Initialized Initialized
Initialized Initialized
Initialized Initialized
Initialized Initialized
Rev. 3.00 Sep. 14, 2006 Page 309 of 408
Section 19 List of Registers
Module
LVDC
Clock oscillator
On-chip oscillation
IIC2
Timer B1
Timer W
ROM
Timer V
REJ09B0105-0300