Register States In Each Operating Mode - Renesas H8S/2100 Series Hardware Manual

Section 27 List of Registers
27.3

Register States in Each Operating Mode

Register
Abbreviation Reset
PIDDR Initialized
PJDDR Initialized
PIODR Initialized
PJODR Initialized

PIPIN

PJPIN
PJPCR Initialized
PINOCR Initialized
PJNOCR Initialized
CCR1 Initialized
CCR2 Initialized
CSTR Initialized
CEIR Initialized
BRR Initialized
CIRRDR0 to 7 Initialized
HHMIN Initialized
HHMAX Initialized
HLMIN Initialized
HLMAX Initialized
DT1MIN Initialized
DT1MAX Initialized
DT0MIN Initialized
DT0MAX Initialized
RMIN Initialized
RMAX Initialized
Rev. 1.00 Apr. 28, 2008 Page 896 of 994
REJ09B0452-0100
High-
Speed/Medium
speed Watch
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Module
Sleep Stop
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Software
Standby Module

PORT









CIR














