Internal Interrupt Sources; Interrupt Exception Handling Vector Tables - Renesas H8S/2100 Series Hardware Manual

16-bit single-chip microcomputer

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Table of Contents

Section 5 Interrupt Controller

Internal Interrupt Sources

Internal interrupts issued from the on-chip peripheral modules have the following features:

• For each on-chip peripheral module there are flags that indicate the interrupt request status,

and enable bits that individually select enabling or disabling of these interrupts. When the

enable bit for a particular interrupt source is set to 1, an interrupt request is sent to the interrupt

• The control level for each interrupt can be set by ICR.

Tables 5.4 and 5.5 list interrupt exception handling sources, vector addresses, and interrupt

priorities. H8S/2140B Group compatible vector mode or extended vector mode can be selected for

the vector addresses by the EIVS bit in system control register 3 (SYSCR3).

For default priorities, the lower the vector number, the higher the priority. Modules set at the same

priority will conform to their default priorities. Priorities within a module are fixed.

An interrupt control level can be specified for a module to which an ICR bit is assigned. Interrupt

requests from modules that are set to interrupt control level 1 (priority) by the interrupt control

level and the I and UI bits in CCR are given priority and processed before interrupt requests from

modules that are set to interrupt control level 0 (no priority).

Interrupt Sources, Vector Addresses, and Interrupt Priorities

(H8S/2140B Group Compatible Vector Mode)

External pin

IRQ6, KIN7 to KIN0

IRQ7, KIN15 to KIN8

Rev. 1.00 Apr. 28, 2008 Page 108 of 994

REJ09B0452-0100

Vector Address

Advanced Mode

H8s/2117r series R4f2117r