Block Diagram (32-Pin Package) - Samsung S3F80JB User Manual

S3F80JB

BLOCK DIAGRAM (32-PIN PACKAGE)

LVD
V
DD
IPOR(note)
X
IN
Main
X OSC
OUT
8-Bit
Basic
Timer
8-Bit
Timer0
/Counter
16-Bit
Timer1
/Counter
16-Bit
Timer2
/Counter
IPOR can be enabled or disabled by IPOR / LVD control bit in the smart option. (Refer to Figure 2-2)
P0.0-0.3 (INT0-INT3)
P0.4-P0.7(INT4)
Port0
I/O Port and Interrupt
Control
SAM8RC CPU
64K-byte
FLASH
Register File
Memory
Carrier Generator
Comparator
Figure 1-1. Block Diagram (32-pin)
NOTE
P1.0-1.7
TEST
Port1
nRESET
Port2
Port3
272-byte
(Counter A)
PRODUCT OVERVIEW
P2.0-2.3
(INT5-INT8)
P2.4-2.7
(INT9)
(CIN0-CIN3)
P3.0/T0PWM/T0CAP/
SDAT/T1CAP/T2CAP
P3.1/REM/T0CK/SCLK
1-3