Analog Devices ADSP-BF506F Hardware Reference Manual page 41

Single Block Read Operation ............................................... 21-39
Using Core ..................................................................... 21-40
Using DMA .................................................................... 21-42
Multiple Block Write Operation ........................................... 21-43
Using Core ..................................................................... 21-44
Using DMA .................................................................... 21-46
Multiple Block Read Operation ........................................... 21-48
Using Core ..................................................................... 21-48
Using DMA .................................................................... 21-50
RSI Registers ............................................................................. 21-52
RSI Power Control Register (RSI_PWR_CONTROL) ......... 21-54
RSI Clock Control Register (RSI_CLK_CONTROL) .......... 21-55
RSI Argument Register (RSI_ARGUMENT) ....................... 21-57
RSI Command Register (RSI_COMMAND) ....................... 21-57
RSI Response Command Register (RSI_RESP_CMD) ......... 21-59
RSI Response Registers (RSI_RESPONSEx) ......................... 21-60
RSI Data Timer Register (RSI_DATA_TIMER) ................... 21-61
RSI Data Length Register (RSI_DATA_LGTH) ................... 21-62
RSI Data Control Register (RSI_DATA_CONTROL) .......... 21-62
RSI Data Counter Register (RSI_DATA_CNT) ................... 21-64
RSI Status Register (RSI_STATUS) ...................................... 21-65
RSI Status Clear Register (RSI_STATUSCL) ........................ 21-68
RSI Interrupt Mask Registers (RSI_MASKx) ........................ 21-70
RSI FIFO Counter Register (RSI_FIFO_CNT) ................... 21-73
ADSP-BF50x Blackfin Processor Hardware Reference
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