Analog Devices ADSP-BF506F Hardware Reference Manual page 18

Adsp-bf50x blackfin processor
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Contents
Internal Interfaces ................................................................... 9-9
GP Timer Interaction With Other Blocks .......................... 9-10
Buffered CLKIN (CLKBUF) ......................................... 9-10
GP Counter .................................................................. 9-10
PPI ............................................................................... 9-10
UART .......................................................................... 9-10
SPORT ........................................................................ 9-11
ACM ............................................................................ 9-11
Performance/Throughput ...................................................... 9-12
Description of Operation ............................................................ 9-12
Operation ............................................................................. 9-12
General-Purpose I/O Modules ............................................... 9-13
GPIO Interrupt Processing .................................................... 9-16
Programming Model ................................................................... 9-22
Hysteresis Control ...................................................................... 9-24
Drive Strength Control ............................................................... 9-26
Memory-Mapped GPIO Registers ............................................... 9-27
Function Enable Registers (PORTx_FER) ............................. 9-30
GPIO Direction Registers (PORTxIO_DIR) ......................... 9-30
GPIO Data Registers (PORTxIO) ......................................... 9-31
GPIO Set Registers (PORTxIO_SET) ................................... 9-32
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ADSP-BF50x Blackfin Processor Hardware Reference

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