Program Suspend Status Bit (Sr2); Block Protection Status Bit (Sr1); Bank Write Status Bit (Sr0) - Analog Devices ADSP-BF506F Hardware Reference Manual

Command Interface to Internal Flash Memory

Program Suspend Status Bit (SR2)

The program suspend status bit indicates that a program operation has
been suspended in the addressed block. When the program suspend status
bit is high (set to '1'), a program/erase suspend command has been issued
and the internal flash memory is waiting for a program/erase resume com-
mand. The program suspend status should only be considered valid when
the program/erase controller status bit is high (program/erase controller
inactive). is set within the program suspend latency time of the pro-
SR2
gram/erase suspend command being issued, therefore, the internal flash
memory may still complete the operation rather than entering the suspend
mode.
When a program/erase resume command is issued, the program suspend
status bit returns low.

Block Protection Status Bit (SR1)

The block protection status bit can be used to identify if a program or
block erase operation has tried to modify the contents of a locked or
locked-down block.
When the block protection status bit is high (set to '1'), a program or erase
operation has been attempted on a locked or locked-down block.
Once set high, the block protection status bit can only be reset low by a
clear status register command or a hardware reset. If set high it should be
reset before a new command is issued, otherwise the new command
appears to fail.

Bank Write Status Bit (SR0)

The bank write status bit indicates whether the addressed bank is pro-
gramming or erasing. The bank write status bit should only be considered
valid when the program/erase controller status
6-22 ADSP-BF50x Blackfin Processor Hardware Reference
is low (set to '0').
SR7