Analog Devices ADSP-BF506F Hardware Reference Manual page 34

Contents
Programming Model ................................................................. 18-22
Beginning and Ending an SPI Transfer ................................. 18-22
Master Mode DMA Operation ............................................ 18-24
Slave Mode DMA Operation ............................................... 18-27
SPI Registers ............................................................................ 18-34
SPI Baud Rate (SPI_BAUD) Register ................................... 18-35
SPI Control (SPI_CTL) Register ......................................... 18-36
SPI Flag (SPI_FLG) Register ............................................... 18-38
SPI Status (SPI_STAT) Register ........................................... 18-40
Mode Fault Error (MODF) ............................................. 18-41
Transmission Error (TXE) ............................................... 18-42
Reception Error (RBSY) .................................................. 18-42
Transmit Collision Error (TXCOL) ................................. 18-42
SPI Transmit Data Buffer (SPI_TDBR) Register .................. 18-42
SPI Receive Data Buffer (SPI_RDBR) Register .................... 18-43
SPI RDBR Shadow (SPI_SHADOW) Register ..................... 18-44
Programming Examples ............................................................ 18-45
Core-Generated Transfer ..................................................... 18-45
Initialization Sequence .................................................... 18-45
Starting a Transfer ........................................................... 18-46
Post Transfer and Next Transfer ....................................... 18-47
Stopping ......................................................................... 18-48
xxxiv ADSP-BF50x Blackfin Processor Hardware Reference