CC = R0 == 0;
IF !CC JUMP Check_TXS;
R2 = W[P0] (Z);
R2 = R2 & R1;
CC = R0 == 0;
IF !CC JUMP Check_TXS;
/* Wait for final word to transmit from SPI */
Final_Word:
R0 = W[P0](Z);
R2 = SPIF;
R0 = R0 & R2;
CC = R0 == 0;
IF CC JUMP Final_Word;
Disable_SPI:
P0.L = lo(SPI_CTL);
P0.H = hi(SPI_CTL);
R0 = W[P0] (Z);
BITCLR (R0,0xe);
W[P0] = R0;
Disable_DMA:
P0.L = lo(DMA7_CONFIG);
P0.H = hi(DMA7_CONFIG);
R0 = W[P0](Z);
BITCLR (R0,0x0);
W[P0] = R0;
RTI;
/* Exit Handler */
ADSP-BF50x Blackfin Processor Hardware Reference
/* Check if TXS stays clear for 2 reads */
/* 0x01 */
/* Clear SPI enable bit */
/* Disable SPI */
/* Clear DMA enable bit */
/* Disable DMA */
SPI-Compatible Port Controller
18-53
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