Programming Examples
R5 = [P5];
bitset(R5, bitpos(IRQ_CNT));
[P5] = R5;
/* Enable the counter */
P5.H = hi(CNT_CONFIG);
P5.L = lo(CNT_CONFIG);
R5 = w[P5](z);
bitset(R5, bitpos(CNTE));
w[P5] = R5.L;
Using the same assumptions from the previous example,
illustrates a sample interrupt handler that is responsible for servicing the
GP counter interrupts. On entry to the handler, the SIC_ISR0 register is
interrogated to determine if the counter is waiting for an interrupt to be
serviced. If so, the handler responsible for processing all counter interrupts
is called.
Listing 13-3. Sample Interrupt Handler for GP Counter Interrupts
_IVG11_handler:
/* Stack management */
[--SP] = RETS;
[--SP] = ASTAT;
[--SP] = (R7:0, P5:0);
/* Was it a counter interrupt? */
P5.H = hi(SIC_ISR0);
P5.L = lo(SIC_ISR0);
R5 = [P5];
CC = bittst(R5, bitpos(IRQ_CNT));
IF !CC JUMP _IVG11_handler.completed;
CALL _IVG11_handler.counter;
_IVG11_handler.completed:
13-30
ADSP-BF50x Blackfin Processor Hardware Reference
Listing 13-3
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