Description Of Operation - Analog Devices ADSP-BF506F Hardware Reference Manual

Description of Operation

When the counter expires, one of three event requests can be generated.
Either a reset or an NMI request is issued to the core event controller
(CEC) or a general-purpose interrupt request is passed to the system inter-
rupt controller (SIC).
Description of Operation
If enabled, the 32-bit watchdog timer counts downward every
If it becomes 0, one of three event requests can be issued to either the
CEC or the SIC. Depending on how the
register is programmed, the event that is generated may be a reset, a
non-maskable interrupt, or a general-purpose interrupt.
The counter value can be read through the 32-bit
register cannot, however, be written directly. Rather, software
WDOG_STAT
writes the watchdog period value into the 32-bit
the watchdog is enabled. Once the watchdog is started, the period value
cannot be altered.
To start the watchdog timer:
1. Set the count value for the watchdog timer by writing the count
value into the watchdog count register (
watchdog timer is not enabled yet, the write to the
ters automatically pre-loads the
2. In the watchdog control register (
generated upon timeout.
3. Enable the watchdog timer in
begins counting down, decrementing the value in the
register.
If software does not service the watchdog in time,
decrementing until it reaches 0. Then, the programmed event is gener-
ated. The counter stops decrementing and remains at zero. Additionally,
12-4
WDOG_CTL
ADSP-BF50x Blackfin Processor Hardware Reference
bit field in the
WDEV
WDOG_STAT
WDOG_CNT
). Since the
WDOG_CNT
register as well.
WDOG_STAT
), select the event to be
WDOG_CTL
. The watchdog timer then
WDOG_STAT
cycle.
SCLK
WDOG_CTL
register. The
register before
regis-
WDOG_CNT
WDOG_STAT
continues