Rsi Status Register (Rsi_Status) - Analog Devices ADSP-BF506F Hardware Reference Manual

RSI Status Register (RSI_STATUS)

The
RSI_STATUS
indicate the status of the RSI. The static flags (bits [10:0]) remain asserted
and are required to be cleared by writing to the
The dynamic flags (bits [21:11]) change state, depending on the state of
the underlying logic. The transmit and receive FIFO logic controls bits
[21:12], which will vary depending on the state of the FIFO and whether
the FIFO is currently enabled for a transmit or receive operation.
RSI Status Register (RSI_STATUS)
Read
15 14 13 12 11 10
0xFFC0 3834
0
RX_FIFO_STAT
TX_FIFO_STAT
RX_ACT
TX_ACT
CMD_ACT
DAT_BLK_END
START_BIT_ERR
DAT_END
RSI Status Register (RSI_STATUS)
Read/Write
31 30 29 28 27 26
0xFFC0 3834
0
Reserved
Figure 21-16. RSI Status Register
ADSP-BF50x Blackfin Processor Hardware Reference
register contains both static and dynamic flags that
9 8 7
0 0 0 0 0 0 0 0
25 24 23 22 21 20 19 18 17 16
1 0 0 1 0 1 0 0
Removable Storage Interface
RSI_STATUSCL
6 5 4 3 2 1 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
register.
Reset = 0x0000 0000
CMD_CRC_FAIL
DAT_CRC_FAIL
CMD_TIMEOUT
DAT_TIMEOUT
TX_UNDERRUN
RX_OVERRUN
CMD_RESP_END
CMD_SEND
Reset = 0x0000 0000
TX_FIFO_FULL
RX_FIFO_FILL
TX_FIFO_ZERO
RX_DAT_ZERO
TX_DAT_RDY
RX_FIFO_RDY
21-65