Analog Devices ADSP-BF506F Hardware Reference Manual page 906

SPORT Registers
SPORT Transmit Configuration 1 Register (SPORT_TCR1)
15 14 13 12 11 10
0
TCKFE (Clock Falling
Edge Select)
0 - Drive data and internal
frame syncs with rising
edge of TSCLK. Sample
external frame syncs with
falling edge of TSCLK.
1 - Drive data and internal
frame syncs with falling
edge of TSCLK. Sample
external frame syncs
with rising edge of TSCLK.
LATFS (Late Transmit
Frame Sync)
0 - Early frame syncs
1 - Late frame syncs
LTFS (Low Transmit
Frame Sync Select)
0 - Active high TFS
1 - Active low TFS
DITFS (Data-Independent
Transmit Frame Sync Select)
0 - Data-dependent TFS generated
1 - Data-independent TFS generated
Figure 19-25. SPORT Transmit Configuration 1 Register
19-48
9 8 7
0 0 0 0 0 0 0 0
ADSP-BF50x Blackfin Processor Hardware Reference
6 5 4 3 2 1 0
Reset = 0x0000
0 0 0 0 0 0 0
TSPEN (Transmit Enable)
0 - Transmit disabled
1 - Transmit enabled
ITCLK (Internal Transmit
Clock Select)
0 -External transmit clock
1 - Internal transmit clock
TDTYPE[1:0] (Data Format-
ting Type Select)
00 - Normal operation
01 - Reserved
10 - Compand using -law
11 - Compand using A-law
TLSBIT (Transmit Bit Order)
0 - Transmit MSB first
1 - Transmit LSB first
ITFS (Internal Transmit
Frame Sync Select)
0 - External TFS used
1 - Internal TFS used
TFSR (Transmit Frame Sync
Required Select)
0 - Does not require TFS for
1 - Requires TFS for every
selected
selected
every data word
data word