Zero-Count Events; Overflow Events; Boundary Match Events - Analog Devices ADSP-BF506F Hardware Reference Manual

Zero-Count Events

The status bit indicates that the
CZEROII
equal to 0x0000 0000 after an increment or decrement. This bit is not set
when the counter value is set to zero by a write to
ting the
W1LCNT_ZERO
bit, an interrupt request is generated.
CZEROIE

Overflow Events

There are two status bits that indicate whether the signed counter register
has overflowed from a positive to a negative value or vice versa.
The bit reports that the 32-bit
COV31II
mented from 0x7FFF FFFF to 0x8000 0000, or decremented from
0x8000 0000 to 0x7FFF FFFF. If enabled by the
request is generated.
Similarly, in applications where only the lower 16 bits of the counter are
of interest, the
0xXXXX 7FFF to 0xXXXX 8000, or from 0xXXXX 8000 to
0xXXXX 7FFF. If enabled by the
generated.

Boundary Match Events

The and
MINCII
"Boundary Comparison Modes" on page
the
CNT_COUNTER
the
CNT_COMMAND
The and
MINCIE
generation on boundary events.
ADSP-BF50x Blackfin Processor Hardware Reference
bit in the
CNT_COMMAND
status bit reports counter transitions from
COV15II
status bits report boundary events as described in
MAXCII
, or
CNT_MAX CNT_MIN
register is written to.
bits in the
MAXCIE
General-Purpose Counter
CNT_COUNTER
CNT_COUNTER
register. If enabled by the
register has either incre-
CNT_COUNT
COV31IE
bit, an interrupt request is
COV15IE
13-10. These bits are not set if
registers are updated by software or
register enable interrupt
CNT_IMASK
has reached a value
or by set-
bit, an interrupt
13-13