Analog Devices ADSP-BF506F Hardware Reference Manual page 19

GPIO Clear Registers (PORTxIO_CLEAR) ........................... 9-32
GPIO Toggle Registers (PORTxIO_TOGGLE) ...................... 9-33
GPIO Polarity Registers (PORTxIO_POLAR) ....................... 9-33
Interrupt Sensitivity Registers (PORTxIO_EDGE) ................. 9-34
GPIO Set on Both Edges Registers (PORTxIO_BOTH) ......... 9-34
GPIO Mask Interrupt Registers (PORTxIO_MASKA/B) ........ 9-35
GPIO Mask Interrupt Set Registers
(PORTxIO_MASKA/B_SET) ............................................. 9-36
GPIO Mask Interrupt Clear Registers
(PORTxIO_MASKA/B_CLEAR) ........................................ 9-38
GPIO Mask Interrupt Toggle Registers
(PORTxIO_MASKA/B_TOGGLE) .................................... 9-40
Programming Examples ............................................................... 9-41
GENERAL-PURPOSE TIMERS
Specific Information for the ADSP-BF50x ................................... 10-1
Overview .................................................................................... 10-2
External Interface .................................................................. 10-3
Internal Interface ................................................................... 10-4
Description of Operation ............................................................ 10-4
Interrupt Processing ............................................................... 10-5
Illegal States .......................................................................... 10-7
Modes of Operation .................................................................. 10-10
Pulse Width Modulation (PWM_OUT) Mode ..................... 10-10
Output Pad Disable ........................................................ 10-12
Single Pulse Generation ................................................... 10-13
ADSP-BF50x Blackfin Processor Hardware Reference
Contents
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