16 TWO-WIRE INTERFACE
CONTROLLER
This chapter describes the two-wire interface (TWI) port. Following an
overview and a list of key features is a description of operation and func-
tional modes of operation. The chapter concludes with a programming
model, consolidated register definitions, and programming examples.
Specific Information for the ADSP-BF50x
For details regarding the number of TWIs for the ADSP-BF50x product,
refer to ADSP-BF504, ADSP-BF504F, ADSP-BF506F Embedded Processor
Data Sheet.
For TWI interrupt vector assignments, refer to
Chapter 4, "System
To determine how each of the TWIs is multiplexed with other functional
pins, refer to
Chapter 9, "General-Purpose
For a list of MMR addresses for each TWI, refer to
MMR
Assignments".
TWI behavior for the ADSP-BF50x that differs from the general informa-
tion in this chapter can be found at the end of this chapter in the section
"Unique Information for the ADSP-BF50x Processor" on page
ADSP-BF50x Blackfin Processor Hardware Reference
Interrupts".
Table 9-1 on page 9-4
Ports".
Table 4-3 on page 4-19
through
Table 9-3 on page 9-6
Chapter A, "System
in
in
16-61.
16-1
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