Analog Devices ADSP-BF506F Hardware Reference Manual page 43

ACM External Pin Timing ................................................... 22-20
Case 1-Chip Select Asserted During the High Phase of
ACLK .......................................................................... 22-22
Case 2-Chip Select Asserted During the Low Phase of
ACLK .......................................................................... 22-23
Case 3-Chip Select Asserted Right Before the Falling
Edge of ACLK .............................................................. 22-24
Case 4-Chip Select Asserted Right Before the Rising
Edge of ACLK .............................................................. 22-25
Case 5-ACLK Polarity Set to 1 (CLKPOL=1) ................ 22-26
ACM Timing Specifications ................................................. 22-26
Programming Model ................................................................. 22-27
ACM Registers .......................................................................... 22-31
ACM Control (ACM_CTL) Register ................................... 22-32
ACM Status (ACM_STAT) Register ..................................... 22-33
ACM Event Status (ACM_ES) Register ................................ 22-34
ACM Event Interrupt Mask (ACM_IMSK) Register ............. 22-35
ACM Missed Event Status (ACM_MS) Register ................... 22-36
ACM Event Missed Interrupt Mask (ACM_EMSK)
Register ............................................................................ 22-37
ACM Event Control (ACM_ERx) Registers .......................... 22-38
ACM Event Time (ACM_ETx) Registers .............................. 22-39
ACM Timing Configuration (ACM_TCx) Registers ............. 22-39
ACM Timing Configuration 0 (ACM_TC0) Register ....... 22-40
ACM Timing Configuration 1 (ACM_TC1) Register ....... 22-41
Programming Examples ............................................................. 22-41
ADSP-BF50x Blackfin Processor Hardware Reference
Contents
xliii