The TWI externally moves 8-bit data while maintaining compliance with
2
the I
C bus protocol. The Philips I
many variants of I
• Simultaneous master and slave operation on multiple device
systems
• Support for multi-master data arbitration
• 7-bit addressing
• 100K bits/second and 400K bit/second data rates
• General call address support
• Master clock synchronization and support for clock low extension
• Separate multiple-byte receive and transmit FIFOs
• Low interrupt rate
• Individual override control of data and clock lines in the event of
bus lock-up
• Input filter for spike suppression
• Serial camera control bus support as specified in OmniVision Serial
Camera Control Bus (SCCB) Functional Specification version 2.1
RSI Interface
The removable storage interface (RSI) controller acts as the host interface
for multi-media cards (MMC), secure digital memory cards (SD Card),
secure digital input/output cards (SDIO), and CE-ATA hard disk drives.
ADSP-BF50x Blackfin Processor Hardware Reference
2
C Bus Specification version 2.1 covers
2
C. The TWI controller includes these features:
Introduction
1-11
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