Spi-Compatible Port Controller; Specific Information For The Adsp-Bf50X - Analog Devices ADSP-BF506F Hardware Reference Manual

18 SPI-COMPATIBLE PORT
CONTROLLER
This chapter describes the serial peripheral interface (SPI) port. Following
an overview and a list of key features is a description of operation and
functional modes of operation. The chapter concludes with a program-
ming model, consolidated register definitions, and programming
examples.

Specific Information for the ADSP-BF50x

For details regarding the number of SPIs for the ADSP-BF50x product,
refer to ADSP-BF504, ADSP-BF504F, ADSP-BF506F Embedded Processor
Data Sheet.
For SPI DMA channel assignments, refer to
Chapter 7, "Direct Memory
For SPI interrupt vector assignments, refer to
Chapter 4, "System
To determine how each of the SPIs is multiplexed with other functional
pins, refer to
Chapter 9, "General-Purpose
For a list of MMR addresses for each SPI, refer to
MMR Assignments".
SPI behavior for the ADSP-BF50x that differs from the general informa-
tion in this chapter can be found in the section
the ADSP-BF50x Processor" on page
ADSP-BF50x Blackfin Processor Hardware Reference
Access".
Interrupts".
Table 9-1 on page 9-4
Ports".
Table 7-7 on page 7-105
Table 4-3 on page 4-19
through Table 9-3 on page 9-6
Chapter A, "System
"Unique Information for
18-54.
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in
18-1