Analog Devices ADSP-BF506F Hardware Reference Manual page 560

Functional Description
+PWMTM/2
COUNT
PWM_AH
PWM_AL
2*PWMDT
PWMSYNC_OUT
PWM_PHASE
Figure 14-3. Typical PWM Outputs of Three-Phase Timing Unit
in Single-Update Mode (Active-Low Waveforms)
The resultant on-times (active low) of the PWM signals over the full
PWM period (two half periods) produced by the Three-Phase PWM Tim-
ing Unit and illustrated in

=
T PWMTM
AH
Range of T
14-16
-PWMTM/2
0
PWMCHA
PWMTM
Figure 14-3, may be written as:
 
+
2 PWMCHA PWMDT
= [ ,
0 2 PWMTM
AH
ADSP-BF50x Blackfin Processor Hardware Reference
0
PWMCHA
2*PWMDT
PWMTM
–
 
t
SCLK
+PWMTM/2
  t 
SCLK
]