Analog Devices ADSP-BF506F Hardware Reference Manual page 483


If the PPI frame syncs are applied externally, timer 0 and timer 1
are still fully functional and can be used for other purposes not
involving the
and
TMR0
in the
TIMER0_CONFIG
PAB
Figure 10-24. Timer Block Diagram
ADSP-BF50x Blackfin Processor Hardware Reference
pins. Timer 0 and timer 1 must not drive their
TMRx
pins. If operating in
TMR1
and
TIMER1_CONFIG
SIC CONTROLLER
TIMER_STATUS
TIMER_ENABLE
TIMER_DISABLE
PORT CONTROL
General-Purpose Timers
mode, the
PWM_OUT
registers must be set.
bit
OUT_DIS
BLACKFIN
GP TIMERS
10-59