Analog Devices ADSP-BF506F Hardware Reference Manual page 455

SCLK
TMR pin, PULSE_HI = 0
TMR pin, PULSE_HI = 1
TIMER_COUNTER X
TIMER_PERIOD BUFFER
X
TIMER_WIDTH BUFFER
X
TIMER_PERIOD X
X
TIMER_WIDTH
TIMIL
TOVF_ERR
TIMEN
STARTS
COUNTING
NOTE: FOR SIMPLICITY, THE SYNCHRONIZATION DELAY BETWEEN TMR PIN EDGES AND BUFFER
REGISTER UPDATES IS NOT SHOWN.
Figure 10-14. Example Timing for Width Capture Followed by Period
Overflow (
WDTH_CAP
ADSP-BF50x Blackfin Processor Hardware Reference
0xFFFF
1 2 3
FFFC
0
0
3
3
0
0 0
0
3 3
0
MEASUREMENT
REPORT
mode,
PERIOD_CNT
General-Purpose Timers
0xFFFF 0xFFFF 0xFFFF
0 1
FFFD FFFE FFFF
ERROR
REPORT
= 0)
2 3 4 1 2
4
10-31