Interrupt Sensitivity Registers (Portxio_Edge); Gpio Set On Both Edges Registers (Portxio_Both) - Analog Devices ADSP-BF506F Hardware Reference Manual

Memory-Mapped GPIO Registers

Interrupt Sensitivity Registers (PORTxIO_EDGE)

Interrupt Sensitivity Registers (PORTxIO_EDGE)
For all bits, 0 - Level, 1 - Edge
15 14 13 12 11 10
0
Px15 Sensitivity
Px14 Sensitivity
Px13 Sensitivity
Px12 Sensitivity
Px11 Sensitivity
Px10 Sensitivity
Figure 9-21. Interrupt Sensitivity Registers

GPIO Set on Both Edges Registers (PORTxIO_BOTH)

GPIO Set on Both Edges Registers (PORTxIO_BOTH)
For all bits when enabled for edge-sensitivity, 0 - Single edge, 1 - Both edges
Px15 Both Edges
Px14 Both Edges
Px13 Both Edges
Px12 Both Edges
Px11 Both Edges
Px10 Both Edges
Figure 9-22. GPIO Set on Both Edges Registers
9-34
9 8 7
0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
0 0 0 0 0 0 0 0
ADSP-BF50x Blackfin Processor Hardware Reference
6 5 4 3 2 1 0
0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0
Reset = 0x0000
Px0 Sensitivity
Px1 Sensitivity
Px2 Sensitivity
Px3 Sensitivity
Px4 Sensitivity
Px5 Sensitivity
Px6 Sensitivity
Px7 Sensitivity
Px8 Sensitivity
Px9 Sensitivity
0 Reset = 0x0000
Px0 Both Edges
Px1 Both Edges
Px2 Both Edges
Px3 Both Edges
Px4 Both Edges
Px5 Both Edges
Px6 Both Edges
Px7 Both Edges
Px8 Both Edges
Px9 Both Edges