Analog Devices ADSP-BF506F Hardware Reference Manual page 11

Internal Flash Memory Control Registers ..................................... 6-88
Internal Flash Memory Control (FLASH_CONTROL)
Register .............................................................................. 6-88
Internal Flash Memory Control Set
(FLASH_CONTROL_SET) Register .................................. 6-91
Internal Flash Memory Control Clear
(FLASH_CONTROL_CLEAR) Register ............................. 6-91
DIRECT MEMORY ACCESS
Specific Information for the ADSP-BF50x ..................................... 7-1
Overview and Features .................................................................. 7-2
DMA Controller Overview ............................................................ 7-4
External Interfaces ................................................................... 7-4
Internal Interfaces .................................................................... 7-4
Peripheral DMA ...................................................................... 7-5
Memory DMA ........................................................................ 7-6
Handshaked Memory DMA (HMDMA) Mode .................... 7-8
Modes of Operation ...................................................................... 7-9
Register-Based DMA Operation ............................................... 7-9
Stop Mode ........................................................................ 7-11
Autobuffer Mode .............................................................. 7-11
Two-Dimensional DMA Operation ........................................ 7-11
Examples of Two-Dimensional DMA ................................. 7-13
Descriptor-based DMA Operation ......................................... 7-14
Descriptor List Mode ........................................................ 7-15
Descriptor Array Mode ...................................................... 7-15
ADSP-BF50x Blackfin Processor Hardware Reference
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