Features - Analog Devices ADSP-BF506F Hardware Reference Manual

Overview

Features

Each UART includes these features:
• 5 – 8 data bits
• 1 or 2 stop bits (1 1/2 in 5-bit mode)
• Even, odd, and sticky parity bit options
• Additional 4-stage receive FIFO with programmable threshold
interrupt
• Flexible transmit and receive interrupt timings
• 3 interrupt outputs for reception, transmission, and status
• Independent DMA operation for receive and transmit
• Programmable automatic RTS/CTS hardware flow control on
UART1
• False start bit detection
• SIR IrDA operation mode
• Internal loop back
• Improved bit rate granularity
The UARTs are logically compliant to EIA-232E, EIA-422, EIA-485 and
LIN standards, but usually require external transceiver devices to meet
electrical requirements. In IrDA® (Infrared Data Association) mode, the
UARTs meet the half-duplex IrDA SIR (9.6/115.2 Kbps rate) protocol.
15-2 ADSP-BF50x Blackfin Processor Hardware Reference