Analog Devices ADSP-BF506F Hardware Reference Manual page 37

SPORT Registers ...................................................................... 19-45
Register Writes and Effective Latency ................................... 19-46
SPORT Transmit Configuration
(SPORT_TCR1 and SPORT_TCR2) Registers ................. 19-47
SPORT Receive Configuration
(SPORT_RCR1 and SPORT_RCR2) Registers .................. 19-52
Data Word Formats ............................................................. 19-56
SPORT Transmit Data (SPORT_TX) Register ..................... 19-57
SPORT Receive Data (SPORT_RX) Register ....................... 19-59
SPORT Status (SPORT_STAT) Register .............................. 19-62
SPORT Transmit and Receive Serial Clock Divider
(SPORT_TCLKDIV and SPORT_RCLKDIV) Registers ... 19-63
SPORT Transmit and Receive Frame Sync Divider
(SPORT_TFSDIV and SPORT_RFSDIV) Registers .......... 19-64
SPORT Multichannel Configuration
(SPORT_MCMC1 and SPORT_MCMC2) Registers ........ 19-65
SPORT Current Channel (SPORT_CHNL) Register ........... 19-66
SPORT Multichannel Receive Selection
(SPORT_MRCSn) Registers ............................................. 19-67
SPORT Multichannel Transmit Selection
(SPORT_MTCSn) Registers ............................................. 19-68
Programming Examples ............................................................. 19-69
SPORT Initialization Sequence ............................................ 19-70
DMA Initialization Sequence ............................................... 19-72
Interrupt Servicing .............................................................. 19-74
Starting a Transfer ............................................................... 19-75
ADSP-BF50x Blackfin Processor Hardware Reference
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