Pwm Period (Pwm_Tm) Register - Analog Devices ADSP-BF506F Hardware Reference Manual

Table 14-5. PWM_STAT Register (Cont'd)
Bit Name
9 PWM_SYNCINT
15:10 Reserved

PWM Period (PWM_TM) Register

The register controls the switching frequency of the generated
PWM_TM
PWM patterns. Bit diagrams and descriptions are provided in
Figure 14-12 and
PWM Period Register (PWM_TM)
15 14 13 12 11 10
0 0
PWM_TM
Figure 14-12. PWM Period Register
Table 14-6. PWM_TM Register
Bit Name
15:0 PWM_TM
ADSP-BF50x Blackfin Processor Hardware Reference
Function
PWM sync interrupt
Table 14-6.
9 8 7 6
0 0 0 0 0 0 0 0
5 4 3 2 1 0
0 0 0 0 0 0
Function
PWM period (unsigned)
PWM Controller
Type Default
R/W1C 0
0
Reset = 0x0000
Type Default
RW 0
14-41