Typical SPI-compatible peripheral devices that can be used to interface to
the SPI-compatible interface include:
• Other CPUs or microcontrollers
• Codecs
• A/D converters
• D/A converters
• Sample rate converters
• SP/DIF or AES/EBU digital audio transmitters and receivers
• LCD displays
• Shift registers
• FPGAs with SPI emulation
Interface Overview
Figure 18-1
provides a block diagram of the SPI. The interface is essen-
tially a shift register that serially transmits and receives data bits, one bit at
a time at the
SCK
ted and received at the same time through the use of a shift register. When
an SPI transfer occurs, data is simultaneously transmitted (shifted serially
out of the shift register) as new data is received (shifted serially into the
other end of the same shift register). The
sampling of the data on the two serial data pins.
ADSP-BF50x Blackfin Processor Hardware Reference
rate, to and from other SPI devices. SPI data is transmit-
SPI-Compatible Port Controller
synchronizes the shifting and
SCK
18-3
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