Description Of Operation - Analog Devices ADSP-BF506F Hardware Reference Manual

Description of Operation

Description of Operation
This section describes general SPORT operation, illustrating the most
common use of a SPORT. Since the SPORT functionality is configurable,
this description represents just one of many possible configurations.
Writing to a
SPORT_TX
signal initiates the transmission of serial data. Once transmission has
TFS
begun, each value written to the
the FIFO to the internal transmit shift register. The bits are then sent,
beginning with either the MSB or the LSB as specified in the
register. Each bit is shifted out on the driving edge of
edge of can be configured to be rising or falling. The SPORT gener-
TSCLK
ates the transmit interrupt or requests a DMA transfer as long as there is
space in the TX FIFO.
As a SPORT receives bits, they accumulate in an internal receive register.
When a complete word has been received, it is written to the SPORT
FIFO register and the receive interrupt for that SPORT is generated or a
DMA transfer is initiated. Interrupts are generated differently if DMA
block transfers are performed.
SPORT Disable
The SPORTs are automatically disabled by a processor hardware or soft-
ware reset. A SPORT can also be disabled directly by clearing the
SPORT's transmit or receive enable bits (
and in the
RSPEN
different effect on the SPORT.
A processor reset disables the SPORTs by clearing the
,
SPORT_TCR2 SPORT_RCR1
and enable bits) and the
RSPEN
SPORT_TFSDIVx
Any ongoing operations are aborted.
19-10
register readies the SPORT for transmission. The
SPORT_TX
register, respectively). Each method has a
SPORT_RCR1
, and
SPORT_RCR2
SPORT_TCLKDIV
, and
SPORT_RFSDIVx
ADSP-BF50x Blackfin Processor Hardware Reference
register is transferred through
in the
TSPEN
registers (including the
,
SPORT_RCLKDIV
clock and frame sync divisor registers.
SPORT_TCR1
. The driving
TSCLK
register
SPORT_TCR1
,
SPORT_TCR1
TSPEN
,