Uartx_Lsr Registers - Analog Devices ADSP-BF506F Hardware Reference Manual

from being continued to the TSR shift register. When
bit is ignored. When
The polarities of the
using the
FCPOL
the pins are positive asserted.
Loopback mode (
pin, and internally redirects the transmit output to the receiver.
UARTxRX
The pin remains active and continues to transmit data externally
UARTxTX
as well. Loopback mode also forces the
state, disconnects the
directly connects bit
( ). In loopback mode, writing a 1 to the
UARTx_MSR
, and enable the UART's transmitter. Writing a 0 to the
CTS DCTS
clears bit
UARTxCTS

UARTx_LSR Registers

The line status (
shown in Figure
processor's
UARTx_LSR
perform write-one-to-clear (W1C) operations on most status bits. Reading
this register has no side effects.
The (data ready) bit indicates that data is available in the receiver and
DR
can be read from the
the receiver detects the first valid stop bit. It is cleared by hardware when
the
UARTx_RBR
The (overrun error) bit indicates that further data is received while the
OE
internal receive buffer was full. It is set when sampling the stop bit of the
6th data word. To avoid overruns, read the
DMA receive mode overruns are very unlikely to happen ever. Once an
overrun occurs, the
overwritten by new data until the
ADSP-BF50x Blackfin Processor Hardware Reference
=0, the state of the
ACTS
and
UARTxCTS
bit. If =0, the pins are negative asserted. If
FCPOL
=1) disconnects the receiver's input from the
LOOP_ENA
bit from the
UARTxCTS
to bit
MRTS UARTxCTS
and disable the UART's transmitter.
) registers contain UART status information as
UARTx_LSR
15-10. Unlike the industrial standard, the ADSP-BF50x
register is not read only. Writes to this register can
register. The bit is set by hardware when
UARTx_RBR
register is read.
and receive FIFO are protected from being
UARTx_RBR
UART Port Controllers
input signal is ignored.
CTS
pins can be programmed
UARTxRTS
pin to its deassertive
UARTxRTS
UARTxCTS
of the modem status register
MRTS
UARTx_RBR
bit is cleared by software. The
OE
=1, the
ACTS XOFF
=1,
FCPOL
input pin, and
bit sets bit
UARTx-
bit
MRTS
register in time. In
15-33