Analog Devices ADSP-BF506F Hardware Reference Manual page 33

Features ...................................................................................... 18-2
Interface Overview ...................................................................... 18-3
External Interface .................................................................. 18-4
SPI Clock Signal (SCK) ..................................................... 18-5
Master-Out, Slave-In (MOSI) Signal ................................. 18-5
Master-In, Slave-Out (MISO) Signal ................................. 18-5
SPI Slave Select Input Signal (SPISS) ................................. 18-6
SPI Slave Select Enable Output Signals .............................. 18-7
Slave Select Inputs ............................................................. 18-8
Use of FLS Bits in SPI_FLG for Multiple Slave SPI
Systems .......................................................................... 18-8
Internal Interfaces ................................................................ 18-11
DMA Functionality ......................................................... 18-11
Description of Operation .......................................................... 18-12
SPI Transfer Protocols .......................................................... 18-12
SPI General Operation ........................................................ 18-15
Clock Signals ....................................................................... 18-16
Interrupt Output ................................................................. 18-17
Functional Description .............................................................. 18-17
Master Mode Operation (Non-DMA) .................................. 18-18
Transfer Initiation From Master (Transfer Modes) ................ 18-19
Slave Mode Operation (Non-DMA) ..................................... 18-20
Slave Ready for a Transfer .................................................... 18-22
ADSP-BF50x Blackfin Processor Hardware Reference
Contents
xxxiii