Analog Devices ADSP-BF506F Hardware Reference Manual page 338

Programming Examples
w[p1] = r0;
/* enable for rising edges */
p1.l = lo(HMDMA1_CONTROL);
r2.l = REP | HMDMAEN;
w[p1] = r2;
If the HMDMA is intended to copy from internal memory to external
devices, the above setup is sufficient. If, however, the data flow is from
outside the processor to internal memory, then this small issue must be
considered—the HMDMA only controls the destination channel of the
memory DMA. It does not gate requests to the source channel at all.
Thus, as soon as the source channel is enabled, it starts filling the DMA
FIFO immediately. In 16-bit DMA mode, this results in eight read strobes
on the EBIU even before the first DMAR1 event has been detected. In
other words, the transferred data and the DMAR1 strobes are eight posi-
tions off. The example in
DMAR1 requests have been received. By doing so, the transmitter is
required to add eight trailing dummy writes after all data words have been
sent. This is because the transmit channel still has to drain the DMA
FIFO.
Listing 7-9. HMDMA With Delayed Processing
/* wait for eight requests */
p1.l = lo(HMDMA1_ECOUNT);
r0 = 7 (z);
initial_requests:
r1 = w[p1] (z);
CC = r1 < r0;
if CC jump initial_requests;
/* disable and reenable to clear edge count */
p1.l = lo(HMDMA1_CONTROL);
r0.l = 0;
7-102
Listing 7-9 delays processing until eight
ADSP-BF50x Blackfin Processor Hardware Reference