Analog Devices ADSP-BF506F Hardware Reference Manual page 21

Adsp-bf50x blackfin processor
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Overview and Features ................................................................ 11-1
Timer Overview .......................................................................... 11-2
External Interfaces ................................................................. 11-2
Internal Interfaces .................................................................. 11-3
Description of Operation ............................................................ 11-3
Interrupt Processing ............................................................... 11-3
Core Timer Registers ................................................................... 11-4
Core Timer Control Register (TCNTL) ................................. 11-5
Core Timer Count Register (TCOUNT) ................................ 11-5
Core Timer Period Register (TPERIOD) ................................ 11-6
Core Timer Scale Register (TSCALE) ..................................... 11-7
Programming Examples ............................................................... 11-7
Specific Information for the ADSP-BF50x ................................... 12-1
Overview and Features ................................................................ 12-1
Interface Overview ...................................................................... 12-3
External Interface .................................................................. 12-3
Internal Interface ................................................................... 12-3
Description of Operation ............................................................ 12-4
Register Definitions .................................................................... 12-5
Watchdog Count (WDOG_CNT) Register ............................ 12-5
Watchdog Status (WDOG_STAT) Register ............................ 12-6
Watchdog Control (WDOG_CTL) Register ........................... 12-7
ADSP-BF50x Blackfin Processor Hardware Reference
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