Clock Signals - Analog Devices ADSP-BF506F Hardware Reference Manual

Description of Operation
the slave and accepts new data from the master into its shift register, while
it transmits requested data out of the shift register through its SPI trans-
mit data pin. Multiple processors can take turns being the master device,
as can other microcontrollers or microprocessors. One master device can
also simultaneously shift data into multiple slaves (known as broadcast
mode). However, only one slave may drive its output to write data back to
the master at any given time. This must be enforced in broadcast mode,
where several slaves can be selected to receive data from the master, but
only one slave at a time can be enabled to send data back to the master.
In a multimaster or multidevice environment where multiple processors
are connected through their SPI ports, all
together, all
MISO
nected together.
For a multislave environment, the processor can make use of up to seven
programmable flags that are dedicated SPI slave select signals for the SPI
slave devices.

At reset, the SPI is disabled and configured as a slave.

Clock Signals

The SCK signal is a gated clock that is only active during data transfers for
the duration of the transferred word. The number of active edges is equal
to the number of bits driven on the data lines. The clock rate can be as
high as one-fourth of the SCLK rate. For master devices, the clock rate is
determined by the 16-bit value in the SPI_BAUD register. For slave
devices, the value in SPI_BAUD is ignored. When the SPI device is a mas-
ter, SCK is an output signal. When the SPI is a slave, SCK is an input
signal. Slave devices ignore the serial clock if the slave select input is
driven inactive (high).
The signal is used to shift out and shift in the data driven onto the
SCK
and
MISO MOSI
clock and sampled on the opposite edge of the clock. Clock polarity and
18-16
pins are connected together, and all
lines. The data is always shifted out on one edge of the
ADSP-BF50x Blackfin Processor Hardware Reference
pins are connected
MOSI
pins are con-
SCK