Can Register Definitions - Analog Devices ADSP-BF506F Hardware Reference Manual

responds appropriately. Otherwise, the activity on the
effect on the processor state.
To enable this functionality, the voltage control register (
programmed with the CAN wakeup enable bit set. The typical sequence
of events to use the CAN wakeup feature is:
1. Use a general-purpose I/O pin to put the external transceiver into
standby mode.
2. Program
the
HIBERNATEB

CAN Register Definitions

The following sections describe the CAN register definitions.
• "Global CAN Registers" on page 17-43
• "Mailbox/Mask Registers" on page 17-48
• "Mailbox Control Registers" on page 17-68
• "Universal Counter Registers" on page 17-82
• "Error Registers" on page 17-84
Table 17-5 through
Table 17-5. Global CAN Register Mapping
Register Name
CAN_CONTROL Master control register
CAN_STATUS
CAN_DEBUG
ADSP-BF50x Blackfin Processor Hardware Reference
with the CAN wakeup enable bit (
VR_CTL
bit set to .
0
Table 17-9 show the functions of the CAN registers.
Function
Global CAN status register
CAN debug register
CANRX
VR_CTL
Notes
Reserved bits 15:8 and 3 must always be
written as '0'
Write accesses have no effect
Use of these modes is not CAN-compliant
CAN Module
pin has no
) must be
) set and
CANWE
17-39