Gpio Input Enable Registers (Portxio_Inen); Gpio Data Registers (Portxio) - Analog Devices ADSP-BF506F Hardware Reference Manual

GPIO Input Enable Registers (PORTxIO_INEN)

GPIO Input Enable Registers (PORTxIO_INEN)
For all bits, 0 - Input Buffer Disabled, 1 - Input Buffer Enabled
Px15 Input Enable
Px14 Input Enable
Px13 Input Enable
Px12 Input Enable
Px11 Input Enable
Px10 Input Enable
Figure 9-15. GPIO Input Enable Registers

GPIO Data Registers (PORTxIO)

GPIO Data Registers (PORTxIO)
1 - Set, 0 - Clear
15 14 13 12 11 10
0
Program Px15
Program Px14
Program Px13
Program Px12
Program Px11
Program Px10
Figure 9-16. GPIO Data Registers
ADSP-BF50x Blackfin Processor Hardware Reference
15 14 13 12 11 10 9
0 0 0 0 0 0 0
9 8 7
0 0 0 0 0 0 0 0
General-Purpose Ports
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
6 5 4 3 2 1 0
0 0 0 0 0 0 0
0
0 Reset = 0x0000
Px0 Input Enable
Px1 Input Enable
Px2 Input Enable
Px3 Input Enable
Px4 Input Enable
Px5 Input Enable
Px6 Input Enable
Px7 Input Enable
Px8 Input Enable
Px9 Input Enable
Reset = 0x0000
Program Px0
Program Px1
Program Px2
Program Px3
Program Px4
Program Px5
Program Px6
Program Px7
Program Px8
Program Px9
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