Table 6-26. Bank and Erase Block Region 2 Information
Internal Flash Region 2
Offset
0x(P+3C) = 0x75
0x(P+3D) = 0x76
0x(P+3E) = 0x77
0x(P+3F) = 0x78
1 The variable P is a pointer which is defined at CFI offset 0x15.
2 Bank regions. There are two bank regions, see
ADSP-BF50x Blackfin Processor Hardware Reference
Description
Data
0x01
Bank region 2 (erase block type 2): bits per cell, internal ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for "internal ECC used"
Bits 5-7: reserved
0x03
Bank region 2 (erase block type 2): page mode and synchronous
mode capabilities (defined in
Bit 0: page-mode reads permitted
Bit 1: synchronous reads permitted
Bit 2: synchronous writes permitted
Bits 3-7: reserved
Feature space definitions
Reserved
Internal Flash Memory
Table 6-23 on page
Table 6-16 on page
6-42.
1
(Cont'd)
6-51)
6-55
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